1. Field of the Invention
The present invention relates to a logic circuit simulator, particularly, to a special purpose processor suitable for high speed simulation of a large scale gate level circuit.
2. Background of the Invention
Documents describing special purpose processors for logic simulation of one gate level (G. F. Pfister: The Yorktown Simulation engine, 19th Design Automation Conference) and one functional level [Sasaki: Summary of the High Speed Simulator (HAL), The 26th National Conference of Information Processing] have been published. A well-known example of the former which is similar to the present invention has the disadvantage of being unable to precisely effect logic simulation of a MOS element circuit, because only unit delay or three-value (0, 1, indefinite) simulation can be carried out thereby.